FPGA Embedded developer

Уровень зарплаты: от 230 000 руб.
Местоположение: Россия, Москва и область (МСК +0ч)

Резюме: FPGA Embedded developer

- Embedded Systems Engineer | STM32F1 / STM32H7 / ESP32 / FreeRTOS / CAN | MedTech


Embedded:

I am developing embedded firmware and control architecture for DDS-240, a distributed MedTech biochemical analyzer based on STM32H723 / STM32H7 Conductor and STM32F103C8T6 / STM32F1 Executor boards.

Technical scope:

- Distributed architecture: Host → STM32H723 Conductor → STM32F103 Executor nodes.
- Firmware stack: STM32CubeIDE, STM32CubeMX, STM32 HAL, CMSIS, FreeRTOS / CMSIS-RTOS v2.
- Communication: CAN / bxCAN, 29-bit Extended CAN ID, 1 Mbit/s bus, strict DLC=8 frames, UART / USART, One-Wire.
- Peripherals: GPIO, EXTI, TIM/PWM, RTC, IWDG, Flash memory services, SWD debug.
- Device control: TMC2209 UART stepper drivers, STEP/DIR/EN motor control, pump outputs, valve outputs, thermoregulation outputs.
- Sensors: One-Wire temperature sensors, liquid level sensors, position sensors, digital/analog IO.
- RTOS design: tasks, queues, thread flags, interrupt-driven CAN RX/TX, watchdog supervisor, heartbeat monitoring.
- Protocol design: DDS-240 command stack, Host API, Conductor recipe execution, atomic Executor commands, device mapping, ACK/DATA/DONE/NACK lifecycle.
- Safety and reliability: safe-state hooks, Error_Handler, HardFault/NMI fault paths, IWDG recovery, fault-injection, reset recovery.
- Diagnostics and validation: F007 GET_STATUS, CAN counters, queue overflow tracking, HAL/ESR error snapshots, SocketCAN, candump/cansend, no-load bench tests.

Short version:

Developing STM32H723 Conductor and STM32F103 Executor firmware for DDS-240, a MedTech biochemical analyzer using FreeRTOS, CAN/bxCAN, UART, One-Wire, GPIO, TIM/PWM, IWDG, Flash services, TMC2209 motion control, fluidics, thermoregulation, sensors, diagnostics, safety patterns, and bench validation.

FPGA:

VHDL programming and tools for design and development of embedded systems and hardware.
FPGA / FPGA SoC design and development.
HW/SW design of embedded systems on FPGA / FPGA SoC
High-level synthesis in developing hardware and software embedded systems on FPGA
Developments experience:
Design of reusable HW/SW IP components for hardware:
- VGA IP component
- Timer IP component
- Watch_dog_timer IP component
Hardware design for the embedded systems:
- VHDL
- High-Level synthesis (HLS)
Software design for the embedded systems:
- Low-level C programming
-RTOS
-Embedded Linux for FPGA SoC
-Device drivers development
Interfaces, connections, and components used:
UART, I2C, SPI, GPIO, VGA, Accelerometer, ADC, analog sensors
Tools used:
- Quartus
-NIOS II Software Build Tools
- ModelSim
Devices and Boards used:
- DE1-SoC (SoC Cyclone V FPGA, Dual-core ARM Cortex A9)
- DE10-Lite FPGA
- BeagleBone Black (ARM Cortex A8, Linux)